The part of the CPU of a computer that functions as a regulator and controller of all computer equipment. all commands can be carried out sequentially without any overlap between one command and another. Some of them are :
1. Organize and control input and output devices.
2. Take instructions from main memory.
3. Retrieve data from main memory (if needed) for processing.
4. Send instructions to the ALU if there are arithmetic calculations and oversee the work of the ALU.
5. Save the results of the process to main memory.
The three-step process of control unit characteristics:
1. Determine the basic elements of the processor.
2. Explain the micro operations that will be performed by the processor.
3. Determine the functions that must be performed by CU in order to cause the formation of micro operations.
Control unit input:
1. Clock / timer
Timers are CU’s way of keeping time. CU causes a micro operation (or a number of concurrent micro operations) to be formed for each time pulse. This pulse is known as processor cycle time.
2. Register instructions
The instruction opcode is then used to determine which micro operations will be performed during the execution cycle.
This flag is needed by the control unit to determine the status of the processor and the results of previous ALU operations.
4. Control signal to control the bus
Implementation of Control Unit Techniques
1. Microprogramming Control Unit
This technique was introduced by Maurice Wilkes in 1951 as a way to run computer program instructions. Microprogram CU is used to generate control signals by reading and issuing microinstruction.
2. Hardwired Control Unit
Used to generate control signals and is usually used on super computers and RISC.
The difference between the two lies in the logic gate where the Hardiwred Control Unit is able to generate all microorder so that the execution is faster.
Divided into 2, namely:
– Vertical control, which means the control signal is coded into bits, then used after coding
– Horizontal Control, means that each control bit adjusts to one gate or machine operation.
a. Instruction register: stores the machine register instructions that are run
b. Control store: contains microprogrammed for all machine instructions, for the fan engine startup to process interrupts
c. Address Computing Circuiting: determine the Control Store address of the micro instructions that will be run next
d. Microprogrammed Counter: saves the address of the next microinstruction
e. Microinstruction Buffer: stores the microinstruction during execution
f. Microinstruction Decoder: generating and issuing micro-orders based on microintroduction and opcode instructions to be executed
MULTIPLE PROCESSOR ORGANISSATION
In multiprocessor systems organizations there are two or more processors. Each processor is self contained including control units, ALU, registers and possibly cache. Each processor has access to shared main memory and I / O devices by using some form of interconnection mechanism. The processor can communicate with each other through memories. Often the memory is arranged in such a way as to allow a number of concurrent access to different blocks of memory. In some configurations, the processor may also have its own main memory and I / O channel in addition to shared resources.
The organizational approach to SMP can be classified as follows:
1. Time shared bus / public bus (Time shared or common bus)
2. Memory that has a number of ports (Multiport memory)
3. MULTIP SYMETRIC Central control unit
The operating system with Symmetric Multiprocessing divides processes and threads into all processors. A system equipped with Symmetric Multiprocessing has:
• Multiple processors
• The processor shares the same main memory & I / O
• The processor can perform the same function
Based on the symmetry, multiprocessing can be divided into
• Asymmetric Multiprocessing (ASMP)
• Symmetric Multiprocessing (SMP)
• Non-uniform memory access (NUMA) multiprocessing
Based on the number of instructions and the data, can be divided into (see Flynn’s Taxonomy)
• SISD (Single Instruction on Single Data Stream)
Single instruction flow, single data. A single processor executes a single instruction stream to operate on data stored in a single memory. Also called Uni-processor. A single processor is in this category.
• SIMD (Single Instruction on Multiple Data Streams)
Single instruction flow, multiple data An instruction engine controls the execution of a number of processing elements on a simultaneous basis. There are a number of process elements where each element has associated memory data, so that each instruction is executed on a different data set (data set) with a different processor. Vector processors and array processors fall into this category. SIMD is a form of synchronous parallel that processes one instruction with many processor elements at the same time. In the SIMD paradigm the most important thing is not processor control but data. Data is processed by each different processor element from one processor to another. So that one program and one control unit work simultaneously on different data sets. To process data efficiently, SIMD makes the process settings into two phases, namely: first sorting and distributing data (data partitioning and distribution) and secondly processing data in parallel (parallel data processing). So efficiency will depend on the number of problems that must be solved in parallel. The best way to use SIMD is to match the number of problems with the number of parallel processors. The number of problems means how much data will be updated and the number of parallel processors means the number of processors available. So if the problem is proportional to the parallel processor then the highest speed can occur, conversely if the problem is only one with many parallel processors which causes the SIMD system to be ineffective. SIMD is often identified as a simple parallel problem, which is not true because the SIMD paradigm is very useful in solving problems that have multiple data that need to be updated simultaneously. Especially useful for ordinary numerical calculations such as matrix and vector calculations.
• MISD (Multiple Instruction on Single Data Stream)
The organized data sequence is transmitted to a series of processors, each processor executing a different sequence of instructions. This structure has not been implemented properly.
• MIMD (Multiple Instruction on Multiple Data Streams)
A series of processor sets executes a different set of instructions simultaneously on different sets of data sets. SMP, Cluster and NUMA systems are in this category. MIMD means that many processors can execute different instructions and data simultaneously. Furthermore, as part of a computer, the processor has great autonomy in carrying out its operations. In general, MIMD is used when many heterogeneous problems that must be solved are very well used to solve large problems, because it exceeds the data and controls that must be passed from task to task. For example in the analogy of a bank, MIMD will show its best work at the same time. Each MIMD teller has several transactions that must be completed one by one without any time wasted and terminated from some parts of the transaction. But the MIMD system will be confused by parallel data flow, because the data flow must be done by the MIMD machine continuously.