Micro operation in the taking cycle
Fetch-cycle (retrieval cycle) is the cycle of taking data to memory or register. Following is an example of a Fetch Cycle data flow cycle:
- At the beginning of the fetch cycle, the address of the next instruction to be executed is in the program counter (PC); in this case, the address is 1100100.
- Step first is to move the address was to register the address memory (MAR) because this is the only register that is connected in the path of the address bus system.
- The second step is to bring instructions. Addresses are desired (at MAR) is placed on the bus address , unit control eject command READ to the bus control, and the results appear on the data bus and copied to register bu bu memory (MBR). We also need to add a PC with 1 to get ready for further instructions. Because the action is ( read word from memory, add 1 to PC) do not mutually interfere, we can do it all at once to save time.
- The third step is to move the contents of the MBR to the instruction register (IR). This frees the MBR to be used during the cycle does not direct that might occur.
With Thus, the fetch cycle simple actually consists of three steps and four operating micro. Each operation of micro involve the movement of data to the inside or on the outside of the register. During the movement is not mutually interfere, some in them could take place in one step, saving lime. By symbolically, we can write down the sequence of events as follows:
t1: MAR <= (PC)
t2: MBR <= memory
PC <= (PC) + l
t3: IR <= (MBR)
To illustrate the cycle we can use register notation. It is a way that is very simple to take down all the steps that are involved. In all cases in which you see the sign brackets eg. [PC], this means that the contents of the object in the brackets already filled. In the case of the first line, the contents of the program counter are entered into the Memory Address Register.
Micro operation in not directly cycle
Indirect cycle (Indirect Cycle) is the execution of an instruction that involves one or more operands in memory, which each operand requires memory access. Retrieval of indirect addresses can be considered as a sub-cycle of instructions or more.
Once the instructions are taken, the next step is to take the source operands. Continuing the example simple we, let us assume the format of the instruction of the address, by addressing directly and not directly allowed. If the instructions specify the address is not direct, then the cycle does not directly have to precede the cycle execution. Data flow includes the following micro operations:
t1: MAR <= (IR ( Address ))
t2: MBR <= memory
t3: IR ( address ) <= (MBR ( address ))
The address field in the instruction is moved to MAR. This is then used to retrieve the operand address. Finally, fields of the address IR updated on the MBR, so that now contains the address directly, and not the address is not direct. IR is now in the same state as if indirect addressing is not being used, and is ready to carry out the execution cycle. We missed the cycle it for a moment, to consider the cycle interruptions.
After a cycle of capture is complete, the unit control check the contents of the IR to determine whether it contains specifier operands using the addressing is not direct. If so, an indirect cycle is carried out. As shown in the image below, this is a simple cycle. The rightmost N bit of the MBR, which contains the address reference, will be transferred to MAR. Then the unit control request memory read, to get the address that is desired from the operand to the MBR.
Micro operations in Interrupt cycle
Interrupt-Cycle is a special request to the microprocessor to do something. If an interruption occurs, the computer will first stop what it is doing and do what is asked by the interrupt.
In IBM PC (Personal Computer) and compatible 256 interrupts are provided which are numbered from 0 to 255. Interrupt numbers 0 to 1 Fh are provided by ROM BIOS, which is an IC (Integrated Circuit) in a computer that regulates the basic operations of the computer. So if there are interruptions with numbers from 0 to 1 Fh, then by default the computer will switch to the BIOS ROM and implement the programs contained there. Programs that serve an interrupt are called Interrupt Handlers.
Interrupt Cycle Data Flow:
Fill in the PC, when it must be stored so that the CPU can continue the normal activity of interruption.
- The contents of the PC are transferred to the MBR and then written into memory.
- Special memory locations that are reserved for this purpose are loaded into the MAR of the control unit (Control Unit).
- This location is a stack pointer.
- The PC is loaded with the interrupt routine address.
- As a result, the next instruction cycle will begin to take the appropriate instructions.
Following is the symbolic writing of the Interruption cycle:
T1: MBR ß (PC)
Q2: MAR ß Save_Address
T3: Memory ß MBR
As the cycle of making and not directly , cycle interrupt is simple and can be predicted. The contents of the PC when it must be saved so that the CPU can resume activities of normal after being interrupted. With such, the contents of the arc PC redirected to the MBR to be written to memory. Location memory specifically who was booked for the purpose it is inserted into the MAR of unit control. It might, for example, be a stack pointer. The PC is loaded with routine interrupt addresses. As a result, the next instruction cycle will begin by taking the appropriate instructions.
Micro operations in Execution cycle
Execution-Cycle is the process of the CPU to carry out instructions that have been picked up from the main memory and are already in the IR register, the Control Unit on the CPU interprets the instructions, carries out operations that must be performed, such as pickup / retrieval of data from the main memory, send instructions to the ALU to perform arithmetic or logic operations and save the results of the processing back to main memory. While Execution sequence is the process or step of a program execution that occurs and takes place on a microprocessor system. A microprocessor must be able to do the process:
- Fetch Data or retrieve data from both memory and I / O by reading data.
- Process data or process data in one of arithmetic or logic operations.
- Write Data or write data to memory or I / O.
- Fetch Instruction or take instructions, namely reading instructions from memory.
- Interpret Instruction, which is the process of interpreting / translating instructions.
The instruction day is decoded to determine the action of an instruction that must be performed. Instructions in machine language are binary codes in hexadecimal. Each command is coded and arranged in a set of instructions. To get a clear picture, how the parts of a computer or microprocessor system work.
Here are some commands in the Execution Cycle:
- Addition (ADD)
ADD R1, X = Add contents of location X to register R1
T1: MAR (IR (Address))
Q2: MBR Memory
T3: IR (R1) + (MBR)
Fill in location X plus 1. If the result is the same as Zero (0), then the next instruction is skipped.
T1: MAR (IR (Address))
Q2: MBR Memory
T3: IR (MBR) + 1
T4: Memory (MBR)
If (MBR = 0) then (PC + 1)
- BSA X
It is the address of the instruction that is located after the BSA instruction is stored at location X and execution continues at location X + 1. The stored address will be used later for the purposes of return.
T1: MAR (IR (Address))
T2: PC (IR (Address))
Q3: PC (PC) + 1
Micro operation in Instruction cycle
- Program execution will stop if the computer is turned off, an error occurs, or there are instructions that stop the computer.
- Taking instruction subsequent execution of the instruction cycle retrieval (Fetch Cycle) & Cycle Execution (Execute Cycle).
- At the beginning of each instruction cycle, the CPU reads the instructions from memory.
- A register called Program Counter (PC) is used to indicate the address of the instructions that will be taken from memory.
- Each time an instruction is read, the contents of the PC will be added so that the CPU will read the next instruction in sequence.
- The instructions that are read will be loaded into a register on the CPU called the Instruction register (IR).
- Furthermore, the CPU interprets instructions and perform the action that is required.